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bcm ? in a via package rev 1.4 vicorpower.com page 1 of 41 09/2016 800 927.9474 size: 4.35 x 1.40 x 0.37 in 110.55 x 35.54 x 9.40mm features & benefts ? up to 35a continuous low voltage side current ? fixed transformation ratio(k) of 1/8 ? up to 797w/in 3 power density ? 97.7% peak effciency ? built-in emi fltering and in-rush limiting circuit ? parallel operation for multi-kw arrays ? ov, oc, uv, short circuit and thermal protection ? 4414 package ? high mtbf ? thermally enhanced via? package ? pmbus? management interface ? suitable for hot-swap applications typical applications ? 380v dc power distribution ? information and communication technology (ict) equipment ? high end computing systems ? automated test equipment ? industrial systems ? high density energy systems ? transportation ? green buildings and microgrids product description the bcm in a via package is a high effciency bus converter, operating from a 260 to 410v dc high voltage bus to deliver an isolated 32.5 to 51.3v dc unregulated, low voltage. this unique ultra-low profle module incorporates dc-dc conversion, integrated fltering and pmbus? commands and controls in a chassis or pcb mount form factor. the bcm offers low noise, fast transient response and industry leading effciency and power density. a low voltage side referenced pmbus? compatible telemetry and control interface provides access to the bcms internal controller confguration, fault monitoring, and other telemetry functions. leveraging the thermal and density benefts of vicors via packaging technology, the bcm module offers fexible thermal management options with very low top and bottom side thermal impedances. when combined with downstream vicor dc-dc conversion components and regulators, the bcm allows the power design engineer to employ a simple, low-profle design which will differentiate the end system without compromising on cost or performance metrics. part ordering information product function package length package width package type max high side voltage high side voltage range ratio max low side voltage max low side current product grade (case temperature) option field bcm 44 14 x d1 e 51 35 y zz bcm = bus converter module length in inches x 10 width in inches x 10 b = board via v = chassis via internal reference c = -20 to 100c [1] t = -40 to 100c [1] 02 = chassis/pmbus 06 = short pin/pmbus 10 = long pin/pmbus product ratings v hi = 400v (260 C 410v) i lo = up to 35a v lo = 50v (32.5 C 51.3v) ( no load ) k = 1/8 [1] high temperature current derating may apply; see figure 1, specifed thermal operating area. bcm ? in a via package bus converter isolated fixed-ratio dc-dc converter BCM4414XD1E5135YZZ c us ? s nr tl cu s
bcm ? in a via package rev 1.4 vicorpower.com page 2 of 41 09/2016 800 927.9474 typical application BCM4414XD1E5135YZZ + prm + vtm, remote sense confguration BCM4414XD1E5135YZZ + prm + vtm, adaptive loop confguration external current sens e sgnd sgnd vo ltage reference with soft star t vo ltage sense and error amplifier (dif ferential ) vtm start up pulse sgnd in out gnd v + vout ?in +in v ? prm enable trim share/ control node al ifb vc vt va ux ref/ ref_en +in ?in +out ?out prm_sgnd sgnd tm vc pc +in ?in ?out +out isola tion boundr y vtm hv lv ref 3312 sgnd v oltage sens e sgnd load prm_sgnd c i_prm_elec r i_prm_damp l i_prm_flt r o_prm_damp l o_prm_flt c o_prm_ce r c o_vtm_cer v ref enable/disabl e switch ?hi +lo ?lo fuse isola tion boundr y hv lv +hi c hi source_rt n v hi ext_bias sda host c sgnd pmbus bca_sgnd + ? v ext scl sgnd c_sgnd addr } 3 bca_sgnd 0 bcm in a via package prm enable trim share/ control node al ifb vc vt v aux ref/ ref_en +in ?in +out ?out tm vc pc +in ?in ?out +out adaptive loop te mperature feedback vtm start up pulse prm_sgnd sgnd isola tion boundry load_rtn vtm hv lv bcm in a via package ?hi +lo ?lo fuse isola tion boundry hv lv +hi r i_prm_cer r trim_prm r al_prm prm_sgnd c hi source_rtn v hi r i_prm_damp l i_prm_flt r o_prm_damp l o_prm_flt c o_prm_cer load v out c o_vtm_cer enable/disabl e switch ext_bias sda host c sgnd pmbus bca_sgnd + ? v ext scl sgnd c_sgnd addr } 3 prm_sgnd bca_sgnd BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 3 of 41 09/2016 800 927.9474 13 +hi +lo to p view bcm in a 4414 via package - chassis (lug) mount ?lo ?hi 5 ext bias 6 scl 7 sda 8 sgnd 9 addr pmbus? pmbus? 2 4 ?hi ?lo to p view bcm in a 4414 via package - board (pcb) mount +lo +hi 9 addr 8 sgnd 7 sda 6 scl 5 ext bias 24 13 pin confguration pin descriptions pin number signal name type function 1 +hi high side power positive transformer power terminal on high voltage side 2 Chi high side power return negative transformer power terminal on high voltage side 3 +lo low side power positive transformer power terminal on low voltage side 4 Clo low side power return negative transformer power terminal on low voltage side 5 ext bias input 5v supply input 6 scl input i 2 c clock, pmbus? compatible 7 sda input/output i 2 c data, pmbus? compatible 8 sgnd low side signal return signal ground 9 addr input address assignment - resistor based note: the dot on the via housing indicates the location of the signal pin 9. notes: all signal pins (5, 6, 7, 8, 9) are referenced to low voltage side and isolated from the high voltage side. keep sgnd signal of the bcm in a via package separated from the low voltage side power return terminal (Clo) in electrical design. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 4 of 41 09/2016 800 927.9474 absolute maximum ratings the absolute maximum ratings below are stress ratings only. operation at or beyond these maximum ratings can cause permanent damage to the device. parameter comments min max unit +hi to Chi -1 480 v hi_dc or lo_dc slew rate n/a v/s +lo to Clo -1 60 v ext bias to sgnd -0.3 10 v 0.15 a scl to sgnd -0.3 5.5 v sda to sgnd -0.3 5.5 v addr to sgnd -0.3 3.6 v dielectric withstand* see note below high voltage side to case basic insulation 2121 v dc high voltage side to low voltage side reinforced insulation (4242v dc ) 2121 v dc low voltage side to case functional insulation 707 v dc * please see dielectric withstand section for details regarding test procedure, test values and insulation levels. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 5 of 41 09/2016 800 927.9474 electrical specifcations specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. attribute symbol conditions / notes min typ max unit general powertrain high voltage side to low voltage side specifcation (forward direction) hi side input voltage range, continuous v hi_dc 260 410 v hi side input voltage range, transient v hi_trans 260 410 v v hi controller v c_active v hi_dc voltage where c is initialized, (powertrain inactive) 120 v hi to lo input quiescent current i hi_q disabled, v hi_dc = 400v 2 ma t case 100oc 4 hi to lo no load power dissipation p hi_nl v hi_dc = 400v, t case = 25oc 10.5 17 w v hi_dc = 400v 6 21 v hi_dc = 260v to 410v, t case = 25 oc 18 v hi_dc = 260v to 410v 22 hi to lo inrush current peak i hi_inr_pk v hi_dc = 410v, c lo_ext = 100 f, r load_lo = 25% of full load current 6 a t case 100oc 12 dc hi side input current i hi_in_dc at i lo_out_dc = 35a, t case 70oc 4.5 a transformation ratio k high voltage to low voltage k = v lo_dc / v hi_dc , at no load 1/8 v/v lo side output current (continuous) i lo_out_dc t case 70oc 35 a lo side output current (pulsed) i lo_out_pulse 2ms pulse, 25% duty cycle, i lo_out_avg 50% rated i lo_out_dc 40 a hi to lo effciency (ambient) h amb v hi_dc = 400v, i lo_out_dc = 35a 96.5 97.2 % v hi_dc = 260v to 410v, i lo_out_dc = 35a 95.3 v hi_dc = 400v, i lo_out_dc = 17.5a 96.8 97.6 hi to lo effciency (hot) h hot v hi_dc = 400v, i lo_out_dc = 35a, t case = 70c 95.7 96.5 % hi to lo effciency (over load range) h 20% 7a < i lo_out_dc < 35a 94.5 % hi to lo output resistance r lo_cold v hi_dc = 400v, i lo_out_dc = 35a, t case = -40c 18 22 25 m r lo_amb v hi_dc = 400v, i lo_out_dc = 35a 27 29.5 33 r lo_hot v hi_dc = 400v, i lo_out_dc = 35a, t case = 70c 32 34.8 37 switching frequency f sw frequency of the lo side voltage ripple = 2x f sw 1.05 1.10 1.14 mhz lo side output voltage ripple v lo_out_pp c lo_ext = 0 f, i lo_out_dc = 35a, v hi_dc = 400v, 20mhz bw 250 mv t case 100oc 550 BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 6 of 41 09/2016 800 927.9474 electrical specifcations (cont.) specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. attribute symbol conditions / notes min typ max unit general powertrain high voltage side to low voltage side specifcation (forward direction) cont. effective hi side capacitance (internal) c hi_int effective value at 400v hi_dc 0.4 f effective lo side capacitance (internal) c lo_int effective value at 50v lo_dc 37.6 f effective lo side output capacitance (external) c lo_out_ext excessive capacitance may drive module into sc protection 100 f effective lo side output capacitance (external) c lo_out_aext c lo_out_aext max = n * 0.5 * c lo_out_ext max , where n = the number of units in parallel powertrain protection high voltage side to low voltage side (forward direction) auto restart time t auto_restart startup into a persistent fault condition. non-latching fault detection given v hi_dc > v hi_uvlo+ 290 360 ms hi side overvoltage lockout threshold v hi_ovlo+ 430 440 450 v hi side overvoltage recovery threshold v hi_ovlo- 420 430 440 v hi side overvoltage lockout hysteresis v hi_ovlo_hyst 10 v hi side overvoltage lockout response time t hi_ovlo 10 s hi side soft-start time t hi_soft-start from powertrain active. fast current limit protection disabled during soft-start 1 ms lo side output overcurrent trip threshold i lo_out_ocp 37.5 47 59 a lo side output overcurrent response time constant t lo_out_ocp effective internal rc flter 3.6 ms lo side output short circuit protection trip threshold i lo_out_scp 52 a lo side output short circuit protection response time t lo_out_scp 1 s overtemperature shutdown threshold t otp+ temperature sensor located inside controller ic (internal temperature) 125 c BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 7 of 41 09/2016 800 927.9474 electrical specifcations (cont.) specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. attribute symbol conditions / notes min typ max unit powertrain supervisory limits high voltage side to low voltage side (forward direction) hi side overvoltage lockout threshold v hi_ovlo+ 420 436 450 v hi side overvoltage recovery threshold v hi_ovlo- 405 426 440 v hi side overvoltage lockout hysteresis v hi_ovlo_hyst 10 v hi side overvoltage lockout response time t hi_ovlo 100 s hi side undervoltage lockout threshold v hi_uvlo- 200 226 250 v hi side undervoltage recovery threshold v hi_uvlo+ 225 244 259 v hi side undervoltage lockout hysteresis v hi_uvlo_hyst 15 v hi side undervoltage lockout response time t hi_uvlo 100 s hi side undervoltage startup delay t hi_uvlo+_delay from v hi_dc = v hi_uvlo+ to powertrain active, (i.e one time startup delay form application of v hi_dc to v lo_dc ) 20 ms lo side output overcurrent trip threshold i lo_out_ocp 42.5 45 47.5 a lo side output overcurrent response time constant t lo_out_ocp effective internal rc flter 2 ms overtemperature shutdown threshold t otp+ temperature sensor located inside controller ic (internal temperature) 125 c overtemperature recovery threshold t otpC temperature sensor located inside controller ic (internal temperature) 105 110 115 c undertemperature shutdown threshold t utp temperature sensor located inside controller ic; protection not available for m-grade units. -45 c undertemperature restart time t utp_restart startup into a persistent fault condition. non-latching fault detection given v hi_dc > v hi_uvlo+ 3 s BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 8 of 41 09/2016 800 927.9474 lo side current (a ) case te mperature (oc) 260 ? 410v 0 5 10 15 20 25 30 35 40 -60 -40 -20 0 20 40 60 80 100 120 lo side capacitance (% rated c lo_ext_max ) lo side current (% i lo_dc ) 0 10 20 30 40 50 60 70 80 90 100 11 0 0 25 50 75 100 figure 3 specifed hi side start-up into load current and external capacitance lo side current (a ) hi side volt age (v ) i lo_out_dc i lo_out_pulse 0 5 10 15 20 25 30 35 40 45 50 260 275 290 305 320 335 350 365 380 395 410 lo side po we r (w ) hi side voltage (v ) p lo_out_dc p lo_out_pulse 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 260 275 290 305 320 335 350 365 380 395 410 figure 1 specifed thermal operating area figure 2 specifed electrical operating area using rated r lo_hot 1. the bcm in a via package is cooled through bottom case (bottom housing). 2. the thermal rating of the bcm in a via package is based on typical measured device effciency. 3. the case temperature in the graph is the measured temperature of the bottom housing, such that operating internal junction temperature of the bcm in a via package does not exceed 125c. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 9 of 41 09/2016 800 927.9474 pmbus? reported characteristics specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. monitored telemetry ? the bcm communication version is not intended to be used without a digital supervisor. attribute digital supervisor pmb us tm read command accuracy (rated range) functional reporting range update rate reported units hi side voltage (88h) read_vin 5%(ll - hl) 130v to 45v 100s v actual = v reported x 10 -1 hi side current (89h) read_iin 20%(10 - 20% of fl) 5%(20 - 133% of fl) -0.85a to 5.9a 100s i actual = i reported x 10 -3 lo side voltage [1] (8bh) read_vout 5%(ll - hl) 16.25v to 56.25v 100s v actual = v reported x 10 -1 lo side current (8ch) read_iout 20%(10 - 20% of fl) 5%(20 - 133% of fl) -7a to 47.5a 100s i actual = i reported x 10 -2 lo side resistance (d4h) read_rout 5%(50 - 100% of fl) at nl 10%(50 - 100% of fl)(ll - hl) 10m to 40m 100ms r actual = r reported x 10 -5 temperature [2] (8dh) read_temperature_1 7c(full range) - 55oc to 130oc 100ms t actual = t reported variable parameter ? factory setting of all below thresholds and warning limits are 100% of listed protection values. ? variables can be written only when module is disabled either en pulled low or v hi < v hi_uvlo- . ? module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to eeprom. attribute digital supervisor pmb us tm command [3] conditions / notes accuracy (rated range) functional reporting range default value hi side overvoltage protection limit (55h) vin_ov_fault_limit v hi_ovlo- is automatically 3% lower than this set point 5%(ll - hl) 130v to 435v 100% hi side overvoltage warning limit (57h) vin_ov_warn_limit 5%(ll - hl) 130v to 435v 100% hi side undervoltage protection limit (d7h) disable_faults can only be disabled to a preset default value 5%(ll - hl) 130v to 260v 100% hi side overcurrent protection limit (5bh) iin_oc_fault_limit 20%(10 - 20% of fl) 5%(20 - 133% of fl) 0 to 5.625a 100% hi side overcurrent warning limit (5dh) iin_oc_warn_limit 20%(10 - 20% of fl) 5%(20 - 133% of fl) 0 to 5.625a 100% overtemperature protection limit (4fh) ot_fault_limit internal temperature 7c(full range) 0 to 125c 100% overtemperature warning limit (51h) ot_warn_limit internal temperature 7c( full range) 0 to 125c 100% turn on delay (60h) ton_delay additional time delay to the undervoltage startup delay 50s 0 to 100ms 0ms [3] refer to internal c datasheet for complete list of supported commands. [1] default read lo side voltage returned when unit is disabled = -300v. [2] default read temperature returned when unit is disabled = -273c. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 10 of 41 09/2016 800 927.9474 signal characteristics specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. please note: for chassis mount model, vicor part number 42550 will be needed for applications requiring the use of the signal pins. signal cable 42550 is rated up to fve insertions and extractions. to avoid unnecessary stress on the connector, the cable should be tied to the chassis. ext. bias (vddb) pin ? 5v supply input, required to power the circuitry internal to the bcm in a via package for communication signals such as scl, sda, addr etc ? voltage to ext bias pin is needed for pmbus ? enable and disable control. it is not needed for pmbus monitoring voltage, current, power or temperature. lower voltage is better. it will help to lower the power dissapation in the internal regulator that is generating 3.3v voltage for communication circuits. ? apply voltage to this pin between 4.5v and 9v. the nominal voltage is 5v. signal type state attribute symbol conditions / notes min typ max unit input regular operation vddb voltage v vddb 4.5 5 9 v vddb current consumption i vddb 50 ma startup inrush current peak i vddb_inr v vddb slew rate = 1v/s 3.5 a turn on time t vddb_on from v vddb_min to pmbus active 1.5 ms sgnd pin ? this pin is supply return pin for ext. bias (vddb) pin. ? all input and output signals (scl, sda, addr) are referenced to sgnd pin. address (addr) pin ? this pin programs only a fixed and persistent slave address for bcm in a via package. ? this pin programs the address using a resistor between addr pin and signal ground. ? the address is sampled during startup and is used until power is reset. ? this pin has 10 k pullup resistor internally between addr pin and internal vdd. ? 16 addresses are available. relative to nominal value of internal vdd (v vdd_nom = 3.3v), a 206.25mv range per address. signal type state attribute symbol conditions / notes min typ max unit multi \ level input regular operation addr input voltage v saddr see address section 0 3.3 v addr leakage current i saddr leakage current 1 a startup addr registration time t saddr from v vdd_in_min 1 ms note: keep sgnd signal of the bcm in a via package separated from the low voltage side power return terminal (Clo) in electrical design. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 11 of 41 09/2016 800 927.9474 scl sda s sp p v ih v il v ih v il t buf t hd,st a t low t r t hd,da t t high t f t su,da t t su,st a t su,st o serial clock input (scl) and serial data (sda) pins ? high power smbus specifcation and smbus physical layer compatible. note that optional smbalert# is signal not supported. ? pmbus tm command compatible. ? the internal c requires the use of a fip - fop to drive sstop. see system diagram section for more details. signal type state attribute symbol conditions / notes min typ max unit digital input/output regular operation electrical parameters input voltage threshold v ih v vdd_in = 3.3v 2.1 v v il v vdd_in = 3.3v 0.8 v output voltage threshold v oh v vdd_in = 3.3v 3 v v ol v vdd_in = 3.3v 0.4 v leakage current i leak_pin unpowered device 10 a signal sink current i load v ol = 0.4v 4 ma signal capacitive load c i total capacitive load of one device pin 10 pf signal noise immunity v noise_pp 10mhz to 100mhz 300 mv timing parameters operating frequency f smb idle state = 0hz 10 400 khz free time between stop and start condition t buf 1.3 s hold time after start or repeated start condition t hd:sta first clock is generated after this hold time 0.6 s repeat start condition setup time t su:sta 0.6 s stop condition setup time t su:sto 0.6 s data hold time t hd:dat 300 ns data setup time t su:dat 100 ns clock low time out t timeout 25 35 ms clock low period t low 1.3 s clock high period t high 0.6 50 s cumulative clock low extend time t low:sext 25 ms clock or data fall time t f measured from (v il_max 0.15) to (v ih_min + 0.15) 20 300 ns clock or data rise time t r 0.9 ? v vdd_in_max to (v il_max 0.15) 20 300 ns BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 12 of 41 09/2016 800 927.9474 timing diagram (forward direction) +v hi inpu t +v lo v hi_dc input turn-on lo side output turn-on hi side input over voltag e v hi_dc input restart enable pulled lo w en a b l e p u lled h i g h s h o rt circ u i t ev en t hi side input voltag e tu r n -o ff output startup over voltag e enable control over current shutdown c initiali z e v hi_ovlo- v hi_ovlo+ v hi_uvl o+ v c_ acti ve v no m v hi_uvlo- t lo_out_scp t hi_uvlo+_delay > BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 13 of 41 09/2016 800 927.9474 application characteristics product is mounted and temperature controlled via top side cold plate, unless otherwise noted. all data presented in this section are collected data from high voltage side sourced units processing power in forward direction. see associated fgures for general trend data. hi to lo, power di ssipation (w ) hi side input voltage (v ) - 40 c 25 c 70 c t case : 0 2 4 6 8 10 12 14 16 18 20 260 275 290 305 320 335 350 365 380 395 410 case te mperature (oc) 260v 400v 410v hi to lo, full load efficiency (% ) v hi_dc : 94.0 94.5 95.0 95.5 96.0 96.5 97.0 97.5 98.0 -40 -20 0 20 40 60 80 100 hi to lo, efficiency (% ) lo side output current (a ) 260v 400v 410v 79 81 83 85 87 89 91 93 95 97 99 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 v hi_dc : figure 4 no load power dissipation vs. v hi_dc figure 5 full load effciency vs. temperature; v hi_dc figure 6 effciency at t case = -40c hi to lo, po we r dissipation lo side output current (a ) 260v 400v 410v 0 8 16 24 32 40 48 56 64 72 80 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 v hi_dc : hi to lo, efficiency (% ) lo side output current (a ) 260v 400v 410v 79 81 83 85 87 89 91 93 95 97 99 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 v hi_dc : figure 7 power dissipation at t case = -40c hi to lo, po we r dissipation lo side output current (a ) 260v 400v 410v 0 8 16 24 32 40 48 56 64 72 80 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 v hi_dc : figure 8 effciency at t case = 25c figure 9 power dissipation at t case = 25c BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 14 of 41 09/2016 800 927.9474 hi to lo, efficiency (% ) lo side output current (a ) 260v 400v 410v 79 81 83 85 87 89 91 93 95 97 99 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 v hi_dc : figure 10 effciency at t case = 70c hi to lo, po we r dissipation lo side output current (a ) 260v 400v 410v 0 8 16 24 32 40 48 56 64 72 80 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 v hi_dc : hi to lo, output resistance (m ) case t emperature ( c ) 35a i lo_dc : 0 5 10 15 20 25 30 35 40 45 50 -40 -20 0 20 40 60 80 100 figure 11 power dissipation at t case = 70c lo side output voltage ri pple (mv) lo side output current (a ) 400v v hi_dc : 0 30 60 90 120 150 180 210 240 270 300 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 figure 12 r lo vs. temperature; nominal v hi_dc i lo_dc = 35a at t case = 70c figure 13 v lo_out_ pp vs. i lo_dc ; no external c lo_out_ ext . board mounted module, scope setting: 20mhz analog bw BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 15 of 41 09/2016 800 927.9474 figure 15 0aC 35a transient response: c hi_in_ext = 10f, no external c lo_out_ ext figure 14 full load ripple, 10f c hi_in_ext ; no external c lo_out_ ext . board mounted module, scope setting: 20mhz analog bw figure 16 35 a C 0a transient response: c hi_in_ext = 10f, no external c lo_out_ ext figure 17 start up from application of v hi_dc = 400v, 25% i hi_dc , 100% c hi_out_ext figure 18 start up from application of en with pre-applied v hi_dc = 400v, 25% i lo_dc , 100% c lo _out_ ext BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 16 of 41 09/2016 800 927.9474 general characteristics specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. attribute symbol conditions / notes min typ max unit mechanical length l lug (chassis) mount 110.30 / [4.34] 110.55 / [4.35] 110.80 / [4.36] mm / [in] length l pcb (board) mount 112.51 / [4.43] 112.76 / [4.44] 113.01 / [4.45] mm / [in] width w 35.29 / [1.39] 35.54 / [1.40] 35.79 / [1.41] mm / [in] height h 9.019 / [0.355] 9.40 / [0.37] 9.781 / [0.385] mm / [in] volume vol without heatsink 36.93 / [2.25] cm 3 / [in 3 ] weight w 140.5 / [4.96] g / [oz] pin material c145 copper, 1/2 hard underplate low stress ductile nickel 50 100 in pin finish palladium 0.8 6 in soft gold 0.12 2 thermal operating junction temperature t internal BCM4414XD1E5135YZZ (t-grade) -40 125 c BCM4414XD1E5135YZZ (c-grade) -20 125 operating case temperature t case BCM4414XD1E5135YZZ (t-grade), derating applied, see safe thermal operating area -40 100 BCM4414XD1E5135YZZ (c-grade), derating applied, see safe thermal operating area -20 100 thermal resistance top side r jc _ top estimated thermal resistance to maximum temperature internal component from isothermal top 1.24 c/w thermal resistance coupling between top case and bottom case r hou estimated thermal resistance of thermal coupling between the top and bottom case surfaces 0.63 c/w thermal resistance bottom side r jc _ bot estimated thermal resistance to maximum temperature internal component from isothermal bottom 1.41 c/w thermal capacity 54 ws/c assembly storage temperature t st BCM4414XD1E5135YZZ (t-grade) -40 125 c BCM4414XD1E5135YZZ (c-grade) -40 125 c esd withstand esd hbm human body model, esda / jedec jds-001-2012 class i-c (1kv to < 2kv) 1000 esd cdm charge device model, jesd 22-c101-e class ii (200v to < 50 0 v) 200 BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 17 of 41 09/2016 800 927.9474 general characteristics (cont.) specifcations apply over all line and load conditions, unless otherwise noted; boldface specifcations apply over the temperature range of -40c t case 100c (t-grade); all other specifcations are at t case = 25oc unless otherwise noted. attribute symbol conditions / notes min typ max unit safety isolation capacitance c hi_lo unpowered unit 620 780 940 pf isolation resistance r hi_lo at 500v dc 10 m mtbf mil-hdbk-217plus parts count - 25c ground benign, stationary, indoors / computer 3.53 mhrs telcordia issu e 2 - method i case iii; 25c ground benign, controlled 3.90 mhrs agency approvals / standards ctvus en 60950-1 curus ul 60950-1 ce marked for low voltage directive and rohs recast directive, as applicable BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 18 of 41 09/2016 800 927.9474 bcm in a via package the bcm in a via package uses a high frequency resonant tank to move energy from high voltage side to low voltage side and vice versa. the resonant lc tank, operated at high frequency, is amplitude modulated as a function of hi side voltage and lo side current. a small amount of capacitance embedded in the high voltage side and low voltage side stages of the module is suffcient for full functionality and is key to achieving high power density. the BCM4414XD1E5135YZZ can be simplifed into the preceeding model. at no load: v lo = v hi ? k (1) k represents the turns ratio of the bcm. rearranging eq (1): k = v lo (2) v hi in the presence of load, v lo is represented by: v lo = v hi ? k C i lo ? r lo (3) and i lo is represented by: i lo = i hi C i hi_q (4) k r lo represents the impedance of the bcm, and is a function of the r ds_on of the hi side and lo side mosfets, pc board resistance of hi side and lo side boards and the winding resistance of the power transformer. i hi_q represents the hi side quiescent current of the bcm control, gate drive circuitry, and core losses. the use of dc voltage transformation provides additional interesting attributes. assuming that r lo = 0 and i hi_q = 0a, eq. (3) now becomes eq. (1) and is essentially load independent, resistor r is now placed in series with v hi . the relationship between v hi and v lo becomes: v lo = (v hi C i hi ? r ) ? k (5) substituting the simplifed version of eq. (4) (i hi_q is assumed = 0a) into eq. (5) yields: v lo = v hi ? k C i lo ? r ? k 2 (6) this is similar in form to eq. (3), where r lo is used to represent the characteristic impedance of the bcm. however, in this case a real r on the high voltage side of the bcm is effectively scaled by k 2 with respect to the low voltage side. assuming that r = 1 , the effective r as seen from the low voltage side is 15.6m , with k = 1/8 . r sac k = 1/32 vi n v out + ? v hi v lo r bcm k = 1/8 figure 20 k = 1/8 bcm with series hi side resistor + ? + ? v lo v hi v? i k + ? + ? i hi_q r lo i hi k ? i lo i lo k ? v hi figure 19 bcm dc model (forward direction) BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 19 of 41 09/2016 800 927.9474 a similar exercise should be performed with the additon of a capacitor or shunt impedance at the high voltage side of the bcm. a switch in series with v hi is added to the circuit. this is depicted in figure 21. a change in v hi with the switch closed would result in a change in capacitor current according to the following equation: i c c assume that with the capacitor charged to v hi , the switch is opened and the capacitor is discharged through the idealized bcm. in this case, i c = i lo ? () substituting eq. (1) and (8) into eq. (7) reveals: i lo = c d v lo (9) k 2 ? dt the equation in terms of the lo side has yielded a k 2 scaling factor for c, specifed in the denominator of the equation. a k factor less than unity results in an effectively larger capacitance on the low voltage side when expressed in terms of the high voltage side. with a k = 1/8 as shown in figure 21, c = 1f would appear as c = 64f when viewed from the low voltage side. low impedance is a key requirement for powering a high- current, low-voltage load effciently. a switching regulation stage should have minimal impedance while simultaneously providing appropriate fltering for any switched current. the use of a bcm between the regulation stage and the point of load provides a dual beneft of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its k factor squared. however, the benefts are not useful if the series impedance of the bcm is too high. the impedance of the bcm must be low, i.e. well beyond the crossover frequency of the system. a solution for keeping the impedance of the bcm low involves switching at a high frequency. this enables small magnetic components because magnetizing currents remain low. small magnetics mean small path lengths for turns. use of low loss core material at high frequencies also reduces core losses. the two main terms of power loss in the bcm module are: n no load power dissipation (p hi_nl ): defned as the power used to power up the module with an enabled powertrain at no load. n resistive loss (p r lo ): refers to the power loss across the bcm module modeled as pure resistive impedance. p dissipated = p hi_nl + p r lo (1) therefore, p lo_out = p hi_in C p dissipated = p hi_in C p hi_nl C p r lo (11) the above relations can be combined to calculate the overall module effciency: d = p lo_out p hi_in C p hi_nl C p r lo (12) p hi_in = p hi_in = v hi ? i hi C p hi_nl C (i lo ) 2 ? r lo v hi ? i hi = 1 C ( p hi_nl + (i lo ) 2 ? r lo ) v hi ? i hi c s sac k = 1/32 vi n v out + ? v hi v lo c bcm k = 1/8 figure 21 bcm with hi side capacitor s BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 20 of 41 09/2016 800 927.9474 thermal considerations the via? package provides effective conduction cooling from either of the two module surfaces. heat may be removed from the top surface, the bottom surface or both. the extent to which these two surfaces are cooled is a key component for determining the maximum power that can be processed by a via, as can be seen from specifed thermal operating area in figure 1. since the via has a maximum internal temperature rating, it is necessary to estimate this internal temperature based on a system-level thermal solution. to this purpose, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. figure 22 shows the thermal circuit for the via module. in this case, the internal power dissipation is p diss , r jc_top and r jc_bot are thermal resistance characteristics of the via module and the top and bottom surface temperatures are represented as t c_top , and t c_bot . it is interesting to notice that the package itself provides a high degree of thermal coupling between the top and bottom case surfaces (represented in the model by the resistor r hou ). this feature enables two main options regarding thermal designs: n single side cooling: the model of figure 22 can be simplifed by calculating the parallel resistor network and using one simple thermal resistance number and the internal power dissipation curves; an example for bottom side cooling only is shown in figure 23. in this case, r jc can be derived as following: n double side cooling: while this option might bring limited advantage to the module internal components (given the surface-to-surface coupling provided), it might be appealing in cases where the external thermal system requires allocating power to two different elements, like for example heatsinks with independent airfows or a combination of chassis/air cooling. current sharing the performance of the bcm in a via package is based on effcient transfer of energy through a transformer without the need of closed loop control. for this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coeffcient series resistance. this type of characteristic is close to the impedance characteristic of a dc power distribution system both in dynamic (ac) behavior and for steady state (dc) operation. when multiple bcm modules of a given part number are connected in an array they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. some general recommendations to achieve matched array impedances include: n dedicate common copper planes/wires within the pcb/chassis to deliver and return the current to the via modules. n provide as symmetric a pcb/wiring layout as possible among via? modules for further details see an:016 using bcm bus converters in high power arrays . p diss + ? t c_top ? t c_bot r jc_top r jc_bot r hou s s + figure 22 double sided cooling via thermal model (r jc_t op + r hou ) ? r jc_bot r jc = (14) r jc_t op + r hou + r jc_bot p diss + ? t c_bot r jc s s figure 23 single-sided cooling via thermal model BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 21 of 41 09/2016 800 927.9474 fuse selection in order to provide fexibility in confguring power systems, bcm in a via package modules are not internally fused. input line fusing of bcm in a via package products is recommended at system level to provide thermal protection in case of catastrophic failure. the fuse shall be selected by closely matching system requirements with the following characteristics: n current rating (usually greater than maximum current of bcm module) n maximum voltage rating (usually greater than the maximum possible input voltage) n ambient temperature n nominal melting i 2 t n recommend fuse: 10a littlefuse 505 series or 10a littlefuse 487 series (hi side) reverse operation bcm modules are capable of reverse power operation. once the unit is started, energy will be transferred from low voltage side back to the high voltage side whenever the low side voltage exceeds v hi ? k. the module will continue operation in this fashion for as long as no faults occur. the BCM4414XD1E5135YZZ has not been qualifed for continuous operation in a reverse power condition. furthermore fault protections which help protect the module in forward operation will not fully protect the module in reverse operation. transient operation in reverse is expected in cases where there is signifcant energy storage on the low voltage side and transient voltages appear on the high voltage side. dielectric withstand the chassis of the bcm in a via package is required to be connected to protective earth when installed in the end application and must satisfy the requirements of iec 60950-1 for class i products. the bcm in a via package contains an internal safety approved isolating component (vi chip) that provides the reinforced insulation from high voltage side to low voltage side. the isolating component is individually tested for reinforced insulation from high voltage side to low voltage side at 4242v dc prior to the fnal assembly of the via?. when the via? assembly is complete the reinforced insulation can only be tested at basic insulation values as specifed in the electric strength test procedure noted in clause 5.2.2 of iec 60950-1. test procedure note from iec 60950-1 for equipment incorporating both reinforced insulation and lower grades of insulation, care is taken that the voltage applied to the reinforced insulation does not overstress basic insulation or supplementary insulation. summary the fnal via assembly provides basic insulation from high voltage side to case, reinforced insulation from high voltage side to low voltage side and functional insulation from low voltage side to case. both sides of the housing are required to be connected to protective earth to satisfy safety and emi requirements. protective earthing can be accomplished through dedicated wiring harness (example: ring terminal clamped by mounting screw) or surface contact (example: pressure contact on bare conductive chassis or pcb copper layer with no solder mask). the case is required to be connected to protective earth in the fnal installation. the construction of the via can be summarized by describing it as a class ii component installed in a class i subassembly. the insulation from high voltage side to low voltage side can only be tested at basic insulation values on the completely assembled via product. sel v r i vi ch ip is ol at io n high voltage side low voltage side figure 25 vi chip before fnal assembly in the via bcm ? 1 r 0_1 z hi_eq1 z lo_eq1 z lo_eq2 v lo z lo_eqn z hi_eq2 z hi_eqn r 0_2 r 0_n bcm ? 2 bcm ? n load dc v hi + figure 24 bcm module array BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 22 of 41 09/2016 800 927.9474 filtering the bcm in a via package has built-in single stage emi fltering with hot-swap circuitry located on high voltage side. typical test set-up block diagram for conducted emissions is shown in figure 27. hot-swap circuitry provides inrush current limiting through the mosfet. further, along with internal ceramic capacitance, it reduces the voltage ripple. external lo side fltering can be added as needed. ceramic capacitance can be used as a lo side bypass for this purpose. moreover, along with hot-swap circuitry, it protects the via from overvoltage transients imposed by a system that would exceed maximum ratings and induce stresses. via hi side and lo side voltage ranges shall not be exceeded. an internal overvoltage function prevents operation outside of the normal operating hi side range. even when disabled, the via is exposed to the applied voltage and the via must withstand it. given the wide bandwidth of the via, the source response is generally the limiting factor in the overall system response. anomalies in the response of the source will appear at the lo side of the module multiplied by its k factor. total load capacitance at the lo side of the via shall not exceed the specifed maximum for correct operation of it in startup and steady state conditions. owing to the wide bandwidth and small lo side impedance of the via, low frequency bypass capacitance and signifcant energy storage may be more densely and effciently provided by adding capacitance at the hi side of the via. at frequencies less than 500khz, the via appears as an impedance of r lo between the source and load. within this frequency range, capacitance at the hi side appears as effective capacitance on the lo side per the relationship defned in eq. (15). this enable a reduction in the size and number of capacitors used in a typical system. hot swap many applications use a power architecture based on a 380v dc distribution bus. this supply level is emerging as a new standard and effcient means for distributing power through boards, racks and chassis mounted telecom and datacom system. the interconnect between the different modules is accomplished with a backplane and motherboard. power is commonly provided to the various module slots via a 380v dc distribution bus. removing the faulty module from the rack is relatively easy, provided the remaining power modules can support the step increase in load. plugging in the replacement module has more potential for problems, as it will present an uncharged capacitor load and draw a large inrush current. this could cause a momentary, but unacceptable interruption or sag to the backplane power bus if not limited. the problem can also arise if ordinary power module connectors are used, since the connector pins will engage and disengage in a random and unpredictable sequence during insertion and removal. hot swap or hot plug is the highly desirable feature in many applications, but it also creates several issues that must be addressed in the system design. a number of related phenomena occur with a live insertion and removal event, including bouncing, arcing between hi side connector pins, larger voltage and current transients. hot swap circuitry in the converter modules protects the module and the rest of the system from the problem associated with live insertion. to meet the maintenance, reconfguration, redundancy and system upgrade, this new bcm module is being designed to address the function of hot-swapping at the 380v dc distribution bus. this new module provides a high level of integration for dc-dc converters in 380v dc distributions, saving the system designer design time and critical board space. hot swap circuitry as shown in figure 28 uses an active mosfet switching device in the hi side line. during insertion, the mosfet is driven into a resistive state to limit the inrush current, and then when the inserted modules hi side capacitor has charged, the mosfet becomes fully conductive to avoid the voltage drop losses. performance verifcation is further illustrated through scope plots of circuits response to various live insertion events. sel v vi ch ip vi a bc m is ol at io n bi ri via hi side circuit pe +hi -hi +lo -lo fi high voltage side low voltage side via lo side circuit figure 26 bcm in a via package after fnal assembly c hi c lo = (15) k 2 dc power supply screen room / filters lisn lisn single via bcm (dut) load emi receiver +hi ?hi +lo ?lo figure 27 typical test set-up block diagram for conducted emissions BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 23 of 41 09/2016 800 927.9474 overall, the objective is always remains the same in hot swap applications; to give system designer the opportunity to build hot swap capability into redundant power module arrays. this allows telecoms and other mission critical applications to continue without interruption even through failure and replacement of one or possibly more of their power modules. hot swap test C test circuit and procedure n two bcms in parallel with mercury relay#1 open n close mercury relay#1 and measure inrush current going into #2 bcm hot swap test C scope pictures ch1: i hi of bcm#2 ch2: v lo of bcm#2 ch3: v hi of bcm#2 shows the fast high side voltage transient at the high side terminal of bcm#2 ch4: v hi of chip bcm#2 shows the soft start charging the high side capacitor as shown, time constant depends upon the gate signal. hot-swap controller charge pump v hi of via bcm of chip bcm i hi of via bcm chip bcm of via bcm v hi v lo figure 28 high-level diagram for 384 v dc hot swap with chip bcm dc-dc converter bcm (k) #1 dc 4000 f maximum input voltage mercury relay #1 electronic load max load bcm (k) #2 +hi ?hi +lo ?lo +hi ?hi +lo ?lo figure 29 test circuit figure 30 hot swap start-up figure 31 same as figure 30 but at a bigger time scale shows the appearance of the bcm#2 BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 24 of 41 09/2016 800 927.9474 system diagram for pmbus? interface the bcm in a via package provides accurate telemetry monitoring and reporting, threshold and warning limits adjustment, in addition to corresponding status fags. the bcms internal c is referenced to low voltage side signal ground. the bcm provides the host system c with access to standalone bcm. the standalone bcm is constantly polled for status by the internal c. direct communication to bcm is enabled by a page command. for example, the page (0x00) prior to a telemetry inquiry points to the internal c data and pages (0x01) prior to a telemetry inquiry points to the bcm connected data. the bcm constantly polls its data through the pmbus. the bcm enables the pmbus compatible host interface with an operating bus speed of up to 400khz. the bcm follows the pmbus command structure and specifcation. ext_bias sda sgnd scl addr bcm in a via package host sda sgnd scl 5 v pmbus? BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 25 of 41 09/2016 800 927.9474 pmbus? interface refer to pmbus power system management protocol specifcationrevision 1.2, part i and ii for complete pmbus specifcations details visit http://pmbus.org . device address the pmbus address (addr pin) should be set to one of a predetermined 16 possible addresses shown in the table below using a resistor between addr pin and sgnd pin. the bcm accepts only a fxed and persistent address and does not support smbus address resolution protocol. at initial power-up, the bcm internal c will sample the address pin voltage, and will hold this address until device power is removed. reported data formats the bcm internal c employs a direct data format where all reported internal c measurements are in volts, amperes, degrees celsius, or seconds. the host uses the following pmbus specifcation to interpret received values metric prefxes. note that the coeffcients command is not supported: where: x, is a real world value in units (a, v, c, s) y, is a twos complement integer received from the internal c m, b and r are twos complement integers defned as follows: [1] default read lo side voltage returned when bcm unit is disabled = C300v. [2] default read temperature returned when bcm unit is disabled = C273c. no special formatting is required when lowering the supervisory limits and warnings. id slave address hex recommended resistor r addr ( ) 1 1010 000b 50h 487 2 1010 001b 51h 1050 3 1010 010b 52h 1870 4 1010 011b 53h 2800 5 1010 100b 54h 3920 6 1010 101b 55h 5230 7 1010 110b 56h 6810 8 1010 111b 57h 8870 9 1011 000b 58h 11300 10 1011 001b 59h 14700 11 1011 010b 5ah 19100 12 1011 011b 5bh 25500 13 1011 100b 5ch 35700 14 1011 101b 5dh 53600 15 1011 110b 5eh 97600 16 1011 111b 5fh 316000 command code m r b ton_delay 60h 1 3 0 read_vin 88h 1 1 0 read_iin 89h 1 3 0 read_vout 8bh 1 1 0 read_iout 8ch 1 2 0 read_temperature_1 8dh 1 0 0 read_pout 96h 1 0 0 mfr_vin_min a0h 1 0 0 mfr_vin_max a1h 1 0 0 mfr_vout_min a4h 1 0 0 mfr_vout_max a5h 1 0 0 mfr_iout_max a6h 1 0 0 mfr_pout_max a7h 1 0 0 read_k_factor d1h 65536 0 0 read_bcm_rout d4h 1 5 0 1 x = ? (y ? 10 -r - b) m ( ) BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 26 of 41 09/2016 800 927.9474 supported command list command code function default data content data bytes page 00h access bcm stored information for all connected devices 00h 1 operation 01h turn bcms on or off 80h 1 on_off_config 02h defnes startup when power is applied as well as immediate on/off control over the bcms 1dh 1 clear_faults 03h clear all bcm and all internal c faults n/a none capability 19h internal c pmbus tm key capabilities set by factory 20h 1 ot_fault_limit 4fh [1] bcm over temperature protection 64h 2 ot_warn_limit 51h [1] bcm over temperature warning 64h 2 vin_ov_fault_limit 55h [1] bcm v hi overvoltage warning 64h 2 vin_ov_warn_limit 57h [1] bcm v hi overvoltage protection 64h 2 iin_oc_fault_limit 5bh [1] bcm i lo overcurrent protection 64h 2 iin_oc_warn_limit 5dh [1] bcm i lo overcurrent warning 64h 2 ton_delay 60h [1] startup delay additional to any bcm fxed delays 00h 2 status_byte 78h summary of bcm faults 00h 1 status_word 79h summary of bcm fault conditions 00h 2 status_iout 7bh bcm overcurrent fault status 00h 1 status_input 7ch bcm overvoltage and under voltage fault status 00h 1 status_temperature 7dh bcm over temperature and under temperature fault status 00h 1 status_cml 7eh internal c pmbus communication fault 00h 1 status_mfr_specific 80h other bcm status indicator 00h 1 read_vin 88h reads hi side voltage ffffh 2 read_iin 89h reads hi side current ffffh 2 read_vout 8bh reads lo side voltage ffffh 2 read_iout 8ch reads lo side current ffffh 2 read_temperature_1 8dh bcm temperature ffffh 2 read_pout 96h reads lo side power ffffh 2 pmbus_revision 98h internal c pmbus compatible revision 22h 1 mfr_id 99h internal c id vi 2 mfr_model 9ah internal c or bcm model part number 18 mfr_revision 9bh internal c or bcm revision fw and hw revision 18 mfr_location 9ch internal c or bcm factory location ap 2 mfr_date 9dh internal c or bcm manufacturing date yyww 4 mfr_serial 9eh internal c or bcm serial number serial number 16 mfr_vin_min a0h bcm minimum rated v hi varies per bcm 2 mfr_vin_max a1h bcm maximum rated v hi varies per bcm 2 mfr_vout_min a4h bcm minimum rated v lo varies per bcm 2 mfr_vout_max a5h bcm maximum rated v lo varies per bcm 2 mfr_iout_max a6h bcm maximum rated i lo varies per bcm 2 mfr_pout_max a7h bcm maximum rated p lo varies per bcm 2 bcm_en_polarity d0h [1] set bcm en pin polarity 02h 1 read_k_factor d1h bcm k factor varies per bcm 2 read_bcm_rout d4h bcm r lo varies per bcm 2 set_all_thresholds d5h [1] set bcm supervisory warning and protection thresholds 646464646464h 6 disable_fault d7h [1] disable bcm overvoltage, overcurrent or under voltage supervisory faults 00h 2 [1] the bcm must be in a disabled state during a write message. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 27 of 41 09/2016 800 927.9474 command structure overview write byte protocol: the host always initiates pmbus? communication with a start bit. all messages are terminated by the host with a stop bit. in a write message, the master sends the slave device address followed by a write bit. once the slave acknowledges, the master proceeds with the command code and then similarly the data byte. s start condition sr repeated start condition rd read wr write x indicated that feld is required to have the value of x a acknowledge (bit may be 0 for an ack or 1 for a nack) p stop condition from master to slave from slave to master continued next line read byte protocol: a read message begins by frst sending a write command, followed by a repeated start bit and a slave address. after receiving the read bit, the internal c begins transmission of the data responding to the command. once the host receives the requested data, it terminates the message with a nack preceding a stop condition signifying the end of a read transfer. figure 1 page command (00h), write byte protocol slave address sw ra command code a 1 71 18 1 x = 0x = 0x = 0 data byte p a 8 1 1 x = 0 slave address sw ra command code a 17 11 81 x = 0x = 0x = 0 slave address sr rd ad ata byte a 17 11 81 x = 1x = 0x = 1 p 1 figure 2 on_off_config command (02h), read byte protocol BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 28 of 41 09/2016 800 927.9474 write word protocol: when transmitting a word, the lowest order byte leads the highest order byte. furthermore, when transmitting a byte, the least signifcant bit (lsb) is sent last. refer to system management bus (smbus) specifcation version 2.0 for more details. note: extended command and packet error checking protocols are not supported. read word protocol: write block protocol: slave address sw ra command code 1 71 18 1 x = 0x = 0x = 0 data byte low 8 p 1 ad ata byte high a 18 1 x = 0x = 0 a slave address sw ra command code 1 71 18 1 x = 0x = 0x = 0 slave address sr rd ad ata byte low a 1 71 18 1 x = 1x = 0x = 0 a p 1 data byte high a 81 x = 1 figure 4 mfr_vin_min command (a0h)_read word protocol slave address sw ra command code 17 11 81 x = 0x = 0x = 0 ad ata byte 1a 18 1 ... x = 0x = 0 byte count = n 8 a ad ata byte na 18 1 ... x = 0x = 0 data byte 2 8 ... ... p 1 figure 5 set_all_thresholds command (d5h)_write block protocol figure 3 ton_delay command (60h)_write word protocol BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 29 of 41 09/2016 800 927.9474 read block protocol: write group command protocol: note that only one command per device is allowed in a group command. figure 6 set_all_thresholds command (d5h)_read block protocol slave address sw ra command code 17 11 81 x = 0x = 0x = 0 first device first command a 1 x = 0 data byte low 8 data byte high a 81 x = 0 one or more data bytes a ... slave address sr wr a command code 17 11 8 1 x = 0x = 0x = 0 second device second command a 1 x = 0 data byte low 8 data byte high a 8 1 x = 0 one or more data bytes a ... slave address sr wr a command code 1 71 18 1 x = 0x = 0x = 0 nth device nth command a 1 x = 0 data byte low 8 data byte high a 81 x = 0 one or more data bytes a p figure 7 disable_fault command (d7h)_write slave address sw ra command code 1 71 18 1 x = 0x = 0x = 0 slave address sr rd ad ata byte = na 1 71 18 1 x = 1x = 0x = 0 ... a ad ata byte 2a 18 1 ... x = 0x = 0 data byte 1 8 ... ... ap 11 x = 1 data byte n 8 BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 30 of 41 09/2016 800 927.9474 supported commands transaction type a direct communication to the bcm internal c and a simulated communication to non-pmbus? devices is enabled by a page command. supported command access privileges with a pre- selected page are defned in the following table. deviation from this table generates a communication error in status_cml register. page command (00h) the page command data byte of 00h prior to a command call will address the internal c specifc data and a page data byte of ffh would broadcast to all of the connected bcms. the value of the data byte corresponds to the pin name trailing number with the exception of 00h and ffh. operation command (01h) the operation command can be used to turn on and off the connected bcm. note that the host operation command will not enable the bcm if the bcm en pin is disabled in hardware with respect to the pre-set pin polarity. only with the en pin active, will the operation command provide on/off control. if synchronous startup is required in the system, it is recommended to use the command from host pmbus in order to achieve simultaneous array startup. this command accepts only two data values: 00h and 80h. if any other value is sent the command will be rejected and a cml data error will result. data byte description 00h c 01h bcm command code page data byte access type 00h 01h page 00h r/w r/w operation 01h r r/w on_off_config 02h r clear_faults 03h w w capability 19h r ot_fault_limit 4fh r/w ot_warn_limit 51h r/w vin_ov_fault_limit 55h r/w vin_ov_warn_limit 57h r/w iin_oc_fault_limit 5bh r/w iin_oc_warn_limit 5dh r/w ton_delay 60h r/w status_byte 78h r/w r status_word 79h r r status_iout 7bh r r/w status_input 7ch r r/w status_temperature 7dh r r/w status_cml 7eh r/w status_mfr_specific 80h r r/w read_vin 88h r read_iin 89h r r read_vout 8bh r read_iout 8ch r r read_temperature_1 8dh r r read_pout 96h r r pmbus_revision 98h r mfr_id 99h r mfr_model 9ah r r mfr_revision 9bh r r mfr_location 9ch r r mfr_date 9dh r r mfr_serial 9eh r r mfr_vin_min a0h r r mfr_vin_max a1h r r mfr_vout_min a4h r r mfr_vout_max a5h r r mfr_iout_max a6h r r mfr_pout_max a7h r r bcm_en_polarity d0h r/w read_k_factor d1h r read_bcm_rout d4h r set_all_thresholds d5h r/w disable_fault d7h r/w 7 6 5 4 3 2 1 0 un it is on when asserted (default) re served 1 0 0 0 0 0 0 0 b BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 31 of 41 09/2016 800 927.9474 on_off_config command (02h) [1] the bcm enable pin is always to be asserted for powerup. the bcm_en_polarity command (d0h) bit[(1) defnes the logic level required for the control pin (i.e bcm enable pin) to be asserted. [2] with respect to the bcm en control pin if used in system [3] see mfr_specific_00 / bcm_en_polarity to change the polarity of the bcm enable pin [4] the bcm powertrain once disabled cannot sink current clear_faults command (03h) this command clears all status bits that have been previously set. persistent or active faults are re-asserted again once cleared. all faults are latched once asserted in the internal c. registered faults will not be cleared when shutting down the bcm powertrain by recycling the bcm high side voltage, or toggling the bcm en pin, or sending the operation command. capability command (19h) the internal c returns a default value of 20h. this value indicates that the pmbus? frequency supported is up to 400khz and that both packet error checking (pec) and smbalert# are not supported. ot_fault_limit command (4fh), ot_warn_ limit command (51h), vin_ov_fault_ limit command (55h), vin_ov_warn_ limit command (57h), iin_oc_fault_ limit command (5bh), iin_oc_warn_ limit command (5dh) the values of these registers are set in non-volatile memory and can only be written when the bcms are disabled. the values of the above mentioned fault and warning are set by default to a 100% of the respective bcm model supervisory limits. however these limits can be set to a lower value. for example: in order for a limit percentage to be set to 80% one would send a write command with a (50h) data word. any values outside the range of (00h C 64h) sent by a host will be rejected , will not override the currently stored value and will set the unsupported data bit in status_cml. the set_all_thresholds command (d5h) combines in one block over temperature fault and warning limits, v hi overvoltage fault and warning limits as well as i lo overcurrent fault and warning limits. a delay prior to a read command of up to 200ms following a write of new value is required. the vin_uv_warn_limit (58h) and vin_uv_fault_limit (59h) are set by the factory and cannot be changed by the host. however, a host can disable the under voltage setting using the disable_fault command (d7h). all fault_response commands are unsupported. the bcm powertrain supervisory limits and powertrain protection will behave as described in the bcm datasheet. in general, once a fault is detected, the bcm powertrain will shut down and attempt to auto- restart after a predetermined delay. ton_delay command (60h) the value of this register word is set in non-volatile memory and can only be written when the bcms are disabled. the maximum possible delay is 100ms. default value is set to (00h). follow this equation below to interpret the reported value. staggering startup in an array is possible with ton_delay command. this delay will be in addition to any startup delay inherent in the bcm module. for example: startup delay from application of v hi is typically 20ms whereas startup with en pin is typically 250s. when ton_delay is greater than zero, the set delay will be added to both. 7 6 5 4 3 2 1 0 reserved for future us e unit does not power up until commanded by th e control pin and operation command not supported: polarity of the control pi n [3] 0 0 0 1 1 1 0 1 b turn off the output and stop transferring energy to the output as fast as possible [4] unit requires that the on/off portion of th e operation command is instructing the unit to run [1] unit requires the control pin to be asserte d to start the unit [2] 7 6 5 4 3 2 1 0 packet error checking is not supporte d maximum supported bus speed is 400 kh z the device does not have smbalert# pin and does not support the smbus alert response protocol reserve d 0 0 1 0 0 0 0 0 b ton_delay actual = t reported ? 10 -3 (s) BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 32 of 41 09/2016 800 927.9474 status_byte (78h) and status_word (79h) all fault or warning fags, if set, will remain asserted until cleared by the host or once the internal c power is removed. this includes under voltage fault, overvoltage fault, overvoltage warning, overcurrent warning, over temperature fault, over temperature warning, under temperature fault, reverse operation, communication faults and analog controller shutdown fault. asserted status bits in all status registers, with the exception of status_word and status_byte, can be individually cleared. this is done by sending a data byte with one in the bit position corresponding to the intended warning or fault to be cleared. refer to the pmbus? power system management protocol specifcation C part ii C revision 1.2 for details. the power_good# bit refects the state of the device and does not refect the state of the power_good# signal limits. the power_good_on command (5eh) and power_good_off command (5fh) are not supported. the power_good# bit is set anytime the bcm is not in the enabled state, to indicate that the powertrain is inactive and not switching. the power_good# bit is cleared when the bcm completes the enabling state, 5 ms after the powertrain is activated allowing for soft-start to elapse. power_good# and off bits cannot be cleared as they always refect the current state of the device. when page (00h) is used the power_good# bit refects the or- ing of all active bcms power_good# bits. when page (01h C 04h) is used power_good# is clear only when the bcm is active. when page (00h) is used unit is off is set when all bcms are not active. when page (01h C 04h) is used unit is off is clear only when the bcm is active. the busy bit can be cleared using clear_all command (03h) or by writing either data value (40h, 80h) to page (00h) using the status_byte (78h). fault reporting, such as smbalert# signal output, and host notifcation by temporarily acquiring bus master status is not supported. if the internal c is still powered, it will retain the last status it received from the bcm and this information will be available to the user via a pmbus status request. this is in agreement with the pmbus standard which requires that status bits remain set until specifcally cleared. note that in this case where the bcm v hi is lost, the status will always indicate an under voltage fault, in addition to any other fault that occurred. none of the above bit will be asserted if either the status_ mfr_specific (80h) or the high byte of the status word is set. status_iout (7bh) unsupported bits are indicated above. a one indicates a fault. unit is busy unit is of f not supported: vout_ov_faul t iout_oc_faul t te mp erature fault or warnin g pmbu s tm communcation even t none of the above vin_uv_fault not suppor ted: unkn ow n faul t or warnin g not supported: other not supported: fan fault or warnin g power_good negated* input fault or warning iout /pout faul t or warnin g not supported: vout fault or warnin g status_mfr_specific 0 1 1 1 1 0 0 0 1 1 0 1 1 1 1 0 low byte high byte status_byt e status_wor d b 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 * equal to power_good # iout_oc_fa ul t not supported: iout_oc_lv_fau lt iout_oc_warning not supported: iout_uc_fault not supported: in power limiting mode not supported: pout_op_fault not supported: pout_op_warnin g not supported: current share fa ul t 7 6 5 4 3 2 1 0 1 0 0 1 0 0 0 0 b BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 33 of 41 09/2016 800 927.9474 status_input (7ch) unsupported bits are indicated above. a one indicates a fault. status_temperature (7dh) unsupported bits are indicated above. a one indicates a fault. status_cml (7eh) unsupported bits are indicated above. a one indicates a fault. the status_cml data byte will be asserted when an unsupported pmbus? command or data or other communication fault occured. status_mfr_specific (80h) the reverse operation bit, if asserted, indicates that the bcm is processing current in reverse. reverse current reported value is not supported. the bcm has analog protections and internal c protections. the analog controller provides an additional layer of protection and has the fastest response time. the analog controller shutdown fault, when asserted, indicates that at least one of the powertrain protection faults is triggered. this fault will also be asserted if a disabled fault event occurs after asserting any bit using the disable_faults command. the bcm uart is designed to operate with the internal c uart. if the bcm uart cml is asserted, it may indicate a hardware or connection issue between both devices. when page command (00h) data byte is equal to (00h), the bcm reverse operation, analog controller shutdown fault, and bcm uart cml bit will return or-ing result of active bcms. the bcm uart cml will also be asserted if any of the active bcms stops responding. the bcm must communicate at least once to the internal c in order to trigger this fault. the bcm uart cml can be cleared from the culprit bcm once the internal c is able to communicate with it once again or can be cleared using page (00h) clear_faults (03h) command. ot_fault ot_warning not supported: ut_warning ut_f ault reserved reserved reserved reserved 7 6 5 4 3 2 1 0 1 1 0 1 0 0 0 0 b invalid or unsupported command received invalid or un supported data received not supported: packet error check failed not supported: memory fault detected reserved other communication faults not suppor ted: other memory or logic faul t not supported: processor fault detecte d 7 6 5 4 3 2 1 0 1 1 0 0 0 0 1 0 b reserved re served reserved reserve d bcm uart cm l analog controller shutdown faul t bcm reverse operation re served 7 6 5 4 3 2 1 0 0 0 0 0 0 1 1 1 b page data byte = (01h - 04h) vin_ov_fault vin_ov_warning not supported: vin_uv_warning vin_uv_fault not supported: iin_oc_faul t not supported: iin_oc_warnin g not supported: pin_op_warning not supported: unit off for insufficient input voltag e 7 6 5 4 3 2 1 0 1 1 0 1 0 0 0 0 b reserved re served reserved re served reserved reserved reserved reserved 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 b BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 34 of 41 09/2016 800 927.9474 read_vin command (88h) if page data byte is equal to (01h - 04h) command will return a reported individual bcms hi side voltage in the following format: read_iin command (89h) if page data byte is equal to (01h - 04h) command will return a reported individual bcms hi side current in the following format: if page data byte is equal (00h) command will return the sum of active bcms hi side current. read_vout command (8bh) if page data byte is equal to (01h - 04h) command will return a reported individual bcms lo side voltage in the following format: read_iout command (8ch) if page data byte is equal to (01h - 04h) command will return a reported individual bcms lo side current in the following format: if page data byte is equal (00h) command will return the sum of active bcms lo side current. read_temperature_1 command (8dh) if page data byte is equal to (01h - 04h) command will return a reported individual bcms temperature in the following format: if page data byte is equal (00h) command will return the maximum temperature of active bcms. read_pout command (96h) if page data byte is equal to (01h - 04h) command will return a reported individual bcms lo side power in the following format: if page data byte is equal to (00h) command will return the sum of active bcms lo side power. mfr_vin_min command (a0h), mfr_vin_max command (a1h), mfr_vout_min command (a4h), mfr_vout_max command (a5h), mfr_iout_max command (a6h), mfr_pout_max command (a7h) these values are set by the factory and indicate the device hi side/ lo side voltage and lo side current range and lo side power capacity. the internal c will report rated bcm hi side voltage minimum and maximum in volts, lo side voltage minimum and maximum in volts, lo side current maximum in amperes and lo side power maximum in watts. if page data byte is equal to (00h) then: n mfr_vin_min command (a0h) will return the highest mfr_vin_min of all active bcms n mfr_vin_max command (a1h) will return the lowest mfr_vin_max of all active bcms n mfr_vout_min command (a4h) will return the highest mfr_vout_min of all active bcms n mfr_vout_max command (a5h) will return the lowest mfr_vout_max of all active bcms n mfr_iout_max command (a6h) will return the sum of mfr_iout_max of all active bcms n mfr_pout_max command (a7h) will return the sum of mfr_pout_max of all active bcms v hi_actual = v hi_reported ? 10 -1 (v) i hi_actual = i hi_reported ? 10 -3 (a) v lo_actual = v lo_reported ? 10 -1 (v) i lo_actual = i lo_reported ? 10 -2 (a) t actual = t reported (c) p lo_actual = p lo_reported (w) BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 35 of 41 09/2016 800 927.9474 bcm_en_polarity command (d0h) the value of this register is set in non-volatile memory and can only be written when the bcms are disabled. when page command (00h) data byte is equal to (01h C 04h), this command defnes the polarity of the en pin. if bcm_en_ polarity is set, the bcm will startup once v hi is greater than the under voltage threshold. the bcm en pin is internally pulled-up to 3.3v. if the bcm_en_ polarity is cleared, an external pull-down is then required. applying v hi greater than the under voltage threshold will not suffce to start the bcm. read_k_factor command (d1h) if page data byte is equal to (01h - 04h) command will return a reported individual bcms k factor in the following format: the k factor is defned in a bcm to represent the ratio of the transformer winding and hence is equal to v lo / v hi . read_bcm_rout command (d4h) if page data byte is equal to (01h - 04h) command will return a reported individual bcms lo side resistance in the following format: set_all_thresholds command (d5h) values of this register block is set in non-volatile memory and can only be written when the bcms are disabled. this command provides a convenient way to confgure all the limits, or any combination of limits described previously using one command. v hi overvoltage, overcurrent and overtemperature values are all set to 100% of the bcm datasheet supervisory limits by default and can only be set to a lower percentage. to leave a particular threshold unchanged, set the corresponding threshold data byte to a value greater than (64h). disable_fault command (d7h) unsupported bits are indicated above. a one indicates that the supervisory fault associated with the asserted bit is disabled. the value of these registers is set in non-volatile memory and can only be written when the bcms are disabled. this command allows the host to disable the supervisory faults and respective statuses. it does not disable the powertrain analog protections or warnings with respect to the set limits in the set_ all_thresholds command. the hi side undervoltage can only be disabled to a pre-set low limit as shown in the functional reporting range in the bcm data sheet. k_factor actual = k_factor reported ? 2 -16 (v/v) bcm_r lo_actual = bcm_r lo_reported ? 10 -5 (
) iout_oc_warn_ limit iout _oc_fault_ limit vin_ov_fault_ limit ot_warn_limit ot_fault_limit vin_ov_warn_ limit 5 4 3 2 1 0 64 64 64 64 64 64 h set_all_thresholds_block (6 bytes) re served reserve d iout_oc_fault reserved re served re served re served vin_ov_fault reserved reserved reserved reserved reserved vin_uv_fault reserved reserved 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 ls b ms b disable_fault 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 b reserved reserve d reserved reserved reserved bcm en pin polarity reserved re served 7 6 5 4 3 2 1 0 0 0 0 0 0 0 1 0 b BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 36 of 41 09/2016 800 927.9474 the internal c implementation vs. pmbus? specifcation rev 1.2 the internal c is an i 2 c compliant, smbus? compatible device and pmbus command compliant device. this section denotes some deviation, perceived as differences from the pmbus part i and part ii specifcation rev 1.2. 1. the internal c meets all part i and ii pmbus specifcation requirements with the following differences to the transport requirement. [a] v vdd_in = 3.3v [b] v bus = 5v 2. the internal c accepts 38 pmbus command codes. implemented commands execute functions as described in the pmbus specifcation. n deviations from the pmbus specifcation: a. section 15, fault related commands ? the limits and warnings unit implemented is percentage (%) a range from decimal (0-100) of the factory set limits. 3. the internal c unsupported pmbus command code response as described in the fault management and reporting: n deviations from the pmbus specifcation: a. pmbus section 10.2.5.3, exceptions ? the busy bit of the status_byte as implemented can be cleared (80h). in order to maintain compatibility with the specifcation (40h) can also be used. n manufacturer implementation of the pmbus spec a. pmbus section 10.5, setting the response to a detected fault condition ? all powertrain responses are pre-set and cannot be changed. refer to the bcm datasheet for details. b. pmbus section 10.6, reporting faults and warnings to the host ? smbalert# signal and direct pmbus device to host communication are not supported. however, the digital supervisor will set the corresponding fault status bits and will wait for the host to poll. c. pmbus section 10.7, clearing a shutdown due to a fault ? there is no reset pin or en pin in the internal c. cycling power to the internal c will not clear a bcm shutdown. the bcm will clear itself once the fault condition is removed. refer to the bcm datasheet for details. d. pmbus section 10.8.1, corrupted data transmission faults: ? packet error checking is not supported. unmet dc parameter implementation vs smbus? spec symbol parameter d4 4tl1a0 smbus? rev 2.0 units min max min max v il [a] input low voltage - 0.99 - 0.8 v v ih [a] input high voltage 2.31 - 2.1 v vdd_in v i leak_pin [b] input leakage per pin 10 22 - 5 a section description response to host status_byte status_cml notes nak ffh cml other fault unsupported data 10.8.1 corrupted data no response; pec not supported 10.8.2 sending too few bits x x 10.8.3 reading too few bits x x 10.8.4 host sends or reads too few bytes x x 10.8.5 host sends too many bytes x x x 10.8.6 reading too many bytes x x x 10.8.7 device busy x x device will ack own address busy bit in status_byte even if status_word is set data transmission faults implementation this section describes data transmission faults as implemented in the internal c. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 37 of 41 09/2016 800 927.9474 section description response to host status_byte status_cml notes nak cml other fault unsupported command unsupported data 10.9.1 improperly set read bit in the address byte x x x 10.9.2 unsupported command code x x x 10.9.3 invalid or unsupported data x x 10.9.4 data out of range x x 10.9.5 reserved bits no response; not a fault data content faults implementation this section describes data content fault as implemented in the internal c. BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 38 of 41 09/2016 800 927.9474 bcm in via package chassis (lug) mount package mechanical drawing 1.171 29.750 .11 2.90 .15 3.86 thru (4) pl. dim 'a' dim 'b' ,1387 ,16(5 7 72% ( 5(029(' 35,25 7286( 86(7<&2/8*25 (48,9)25,1387&211(&7,2 1 $//352'8&7 6 86(7<&2/8*25 (48,9)25287387&211(&7,21 352'8&76$1' 86(7<&2/8*25 (48,9)25287387&211(&7,21 352'8&76$1' 287387 ,16(57 72% ( 5(029(' 35,25 7286( red black blue 8 white yellow dim 'c' .37.015 9.40.38 1 23.98 609.14 1.40 35.54 127(6 product dim 'a' dim 'b' dim 'c' 2214 (0 stage) 2223 1.02 [ 25.96 ] na 2.25 [57.11] 2814 (1 stage) 2223 1.61 [40.93] na 2.84 [72.05] 2814 (0 stage) 3623 1.02 [25.96] .789 [20.033] 2.80 [70.99] 3414 (1 stage) 3623 1.61 [40.93] .789 [20.033] 3.38 [85.93] 3714 (1 stage) 4623 1.61 [40.93] 1.150 [29.200] 3.75 [95.12] 3814 (0 stage) 2361 1.02 [ 25.96 ] 1.277 [32.430] 3.76 [95.59] 3814 (0 stage) 2361 nb m 1.02 [ 25.96 ] 1.277 [32.430] 3.76 [95.59] 4414 (1 stage) 2361 1.61 [40.93] 1.277 [32.430] 4.35 [110.55] 4414 (1 stage) 6123 1.61 [40.93] 1.757 [44.625]4 .35 [110.55] 5614 (1 stage) 2392 1.61 [40.93] 2.490 [63.250] 5.57 [141.37] 5614 (1 stage) 9223 1.61 [40.93] 2.970 [75.445] 5.57 [141.37] )rufkdvvlvprxqwprghov9lfrusduwqxpehu zlooehqhhghgirudssolfdwlrqvuhtxlulqjwkhxvhrivljqdosl qv BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 39 of 41 09/2016 800 927.9474 bcm in via package pcb (board) mount package mechanical drawing and recommended hole pattern .11 2.90 dim 'f' .010 [.254] dim 'd' .010 [.254] dim 'g' .010 [.254] .112.010 2.846.254 .947 24.058 1.17 1 29.750 .067 1.700 .134 3.400 .201 5.10 0 .268 6.800 .452.010 11.475.25 4 .156 3.970 .859.010 21.810.25 4 bottom vew 2 4 10 12 11 13 1 3 1.40 35.54 5 6 7 8 9 dim 'c' dim 'e' dim 'l' .010 [.254] .080 2.03 2 (2) pl. .150 3.810 (2) pl. .025 .635 (5) pl. .37.015 9.40.381 seating plane dim 'a' dim 'b' .15 3.86 (4) pl. 0 top view (component side) notes: 1- rohs compliant per cst-0001 latest revision . 2- see product data sheet for pin designations . dim 'l' short .103 [2.607 ] long .182 [4.613 ] product dim 'a ' dim 'b' dim 'c' dim 'd' dim 'e' dim 'f' dim 'g' 2214 (0 stage) 2223 1.02 [ 25.96 ] na 2.25 [57.11] 1.854 [47.082] 2.34 [59.32] .850 [21.590 ] 2.117 [53.771] 2814 (1 stage) 2223 1.61 [40.93 ] na 2.84 [72.05 ]2 .442 [62.017] 2.92 [74.26 ]1 .439 [36.554] 2.705 [68.706] 2814 (0 stage) 3623 1.02 [ 25.96 ] .789 [20.033] 2.80 [70.99] 2.399 [60.934] 2.88 [73.20 ] .849 [21.562 ]2 .662 [67.623] 3414 (1 stage) 3623 1.61 [40.93] .789 [20.033] 3.38 [85.93 ]2 .988 [75.897] 3.47 [88.14 ] 1.439 [36.553] 3.251 [82.586] 3714 (1 stage) 4623 1.61 [40.93 ]1 .150 [29.200] 3.75 [95.12 ]3 .350 [85.092] 3.83 [97.33] 1.439 [36.553] 3.613 [91.781] 4414 (1 stage) 6123 1.61 [40.93]1 .757 [44.625]4 .35 [110.55] 3.957 [100.517] 4.44 [112.76] 1.439 [36.553]4 .221 [107.206 5614 (1 stage) 9223 1.61 [40.93 ]2 .970 [75.445] 5.57 [141.37] 5.171 [131.337] 5.65 [143.58] 1.439 [36.553] 5.434 [138.026 ] dim 'f' .003 [.076] dim 'b'' .003 [.076] dim 'd'' .003 [.076] dim 'g'' .003 [.076] .112.003 2.846.076 1.171.003 29.750.076 .947.003 24.058.076 .156.003 3.970.076 .859.003 21.810.076 .452.003 11.475.076 .067.003 1.700.076 .134.003 3.400.076 .201.003 5.100.076 .268.003 6.800.076 .190.003 4.826.076 plated thru .030 [.762] annular ring (2) pl .172.003 4.369.076 plated thru .064 [1.626] annular ring (4) pl. .120.003 3.048.076 plated thru .030 [.762] annular ring (2) pl see detail a 2 1 11 10 13 12 4 3 recommended hole pattern (component side) .040.003 1.016.076 plated thru .008 [.203] annular ring (5) pl .023 .584 ty p .046 1.168 (3) pl. .023 .584 ty p detail a scale 8 : 1 9 8 7 6 5 BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 40 of 41 09/2016 800 927.9474 revision history revision date description page number(s) 1.0 03/3/16 initial release n/a 1.1 05/2/16 new power pin nomenclature all 1.2 06/17/16 notes update 2, 3, 10 1.3 08/01/16 charts format update 13, 14, 15 1.4 09/26/16 value of r correction for read_bcm_rout 25 BCM4414XD1E5135YZZ
bcm ? in a via package rev 1.4 vicorpower.com page 41 of 41 09/2016 800 927.9474 vicors comprehensive line of power solutions includes high density ac-dc and dc-dc modules and ac - cessory components, fully confgurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. vicor reserves the right to make changes to any products, specifcations, and product descriptions at any time without notice. information published by vicor has been checked and is believed to be accurate at the time it was printed; however, vicor assumes no responsibility for inaccuracies. testing and other quality controls are used to the extent vicor deems necessary to support vicors product warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. specifcations are subject to change without notice. vicors standard terms and conditions all sales are subject to vicors standard terms and conditions of sale, which are available on vicors webpage or upon request. product warranty in vicors standard terms and conditions of sale, vicor warrants that its products are free from non-conformity to its standard specifcations (the express limited warranty). this warranty is extended only to the original buyer for the period expiring two (2) years after the date of shipment and is not transferable. unless otherwise expressly stated in a written sales agreement signed by a duly authorized vicor signatory, vicor dis - claims all representations, liabilities, and warranties of any kind (whether arising by implication or by operation of law) with respect to the products, including, without limitation, any warranties or representations as to merchantability, fitness for particular purpose, infringement of any patent, copyright, or other intellectual property right, or any other matter. this warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. vicor shall not be liable for collateral or consequential damage. vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes no liability for applications assistance or buyer product design. buyers are responsible for their products and applications using vicor products and components. prior to using or distributing any products that include vicor components, buyers should provide adequate design, testing and operat - ing safeguards. vicor will repair or replace defective products in accordance with its own best judgment. for service under this warranty, the buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior authorization will be returned to the buyer. the buyer will pay all charges incurred in returning the product to the factory. vicor will pay all reshipment charges if the product was defective within the terms of this warranty. life support policy vicors products are not authorized for use as critical components in life support devices or systems without the express prior written approval of the chief executive officer and general counsel of vicor corporation. as used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a signifcant injury to the user. a critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. per vicor terms and conditions of sale, the user of vicor products and components in life support applications assumes all risks of such use and indemnifes vicor against all liability and damages. intellectual property notice vicor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications) relating to the products described in this data sheet. no license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. interested parties should contact vicors intellectual property department. the products described on this data sheet are protected by the following u.s. patents pending vicor corporation 25 frontage road andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 email customer service: custserv@vicorpower.com technical support: apps@vicorpower.com BCM4414XD1E5135YZZ

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